1. Field of the Invention
The present invention generally pertains to associative, or content addressable, memories. The present invention particularly pertains to associative memories having optical storage, and still more particularly to such memories having (i) optical disk storage and (ii) a combined electrical and optical detection and comparison function.
2. Background of the Invention
There has been considerable interest over the past two decades in the ability to achieve recall of an item stored in a memory device based on a partial query, namely an Associative Memory. Reference, for example, T. Kuhonen, Self Organization and Associative Memory, Springer Verlag, 1984. One distinguishing characteristic of an Associative Memory is its ability to recall the correct output pattern even when the input is distorted or incomplete. Associative Memories are also "robust" in the sense that information is stored in a distributed, redundant manner, and that the system degrades gracefully when too many patterns are stored in the memory, or when too much noise is introduced in the input query.
A Content Addressable Memory (CAM) is a special form of an Associative Memory. A CAM produces the address of the desired output pattern when an input is presented. If used in conjunction with a conventional memory device, this system also achieves associative recall, but without the robustness of a distributed storage medium. If used in conjunction with a "holographic" storage device, then this system achieves all of the distinguishing properties of a true associative memory as mentioned above.
The associative memory is a sort of "holy grail" of machine intelligence. It is not a conventional memory. It is rather a memory producing an output that is "associated" with an input--sort of like the human mind. For example, if a digitalized pattern of the spoken word "giraffe" is input to an associative memory containing a vocabulary of such words then the memory will output a signal that effectively says "I detect this word to have been "giraffe" (as opposed to "x-ray", or "orange")". For example, if a digitalized picture of a giraffe is input to an associative memory than the memory might produce a signal that says "I detect this picture to have been of a giraffe" as opposed to a "dog" or a "bird". This function is exceedingly useful. Hence the interest in associative memories.
The key performance measures for a hardware implementation of an associative memory (or a CAM) are its capacity (number of stored bits) and its search rate (bit-operations/sec). In general, both the capacity and the search rate are limited by the particular technology used for storage/processing and by the choice of algorithm.
For purely electronic Associative Memory (or CAM) implementations, there exists a trade-off between the storage capacity and the maximum search rate. While high speed, pipelined VLSI chips (109 bit-ops/sec) have been demonstrated their capacity is severely limited (10-20 Kbit) since all memory resides on-chip. Reference T. Ogura, J. Yamada, S. Yamada, and M. Tan-no, "A 20-Kbit Associative Memory LSI for Artificial Intelligence Machines," IEEE Journal of Solid State Circuits, Vol. 24, No. 4, August, 1989; H. Takata, S. Komori, T. Tamura, F. Asai, H. Satoh, T. Ohno, T. Tokuda, H. Nishikawa, and H. Terada, "A 100 Mega-access per Second Matching Memory for a data driven microprocessor," IEEE Journal of Solid State Circuits, Vol. 25, No. 1, February, 1990; and H. Bergh, J. Eneland, and L. Lundstrom, "A Fault Tolerant Associative Memory with High Speed Operation," IEEE Journal of Solid State Circuits, Vol. 25, No. 4, August, 1990.
Current high-capacity off-line storage systems have low transfer rates relative to these processing speeds. Reference B. Robinson. "Grand challenge to Supercomputing" , Electron. Eng. Times, Vol. 18, September, 1989. For instance, solid-state disk drives, with capacities of 100 Mbytes, can provide data rates on the order of 10 Mbytes/sec. Reference L. Curran. "Wafer scale integration arrives in disk form" , Electron. Design., Vol. 26, October 1989.
Projected development in main memory technologies such as SRAM and DRAM could provide a data transfer bandwidth of 100Mbytes/sec. Reference H. E. Maes et al. "Trends in semiconductor memories", Microelectronics Vol. 20, pp 9-57, 1989. However, their capacity will remain severely limited (1-10 Mbytes). Reference S. Hunter, F. Kiamilev, S. C. Esener, D. A. Parthenopoulos, and P. M. Rentzepis, "Potentials of two-photon based 3-D memories for high performance computing," Appl. Opt. Vol. 29, pp 2058-2066, May, 1990.
The limited storage capacity of semiconductor memories combined with the limited pin-out available on the VLSI chip creates a performance bottleneck for associative memory applications since the serial (or semi-parallel) I/O subsystem forces the processing units to wait for new data.